Cite this Article
Chen Jian-Ying, Zhao Xin-Yuan, Liu Lu, Xu Jing-Ping. Improved performance of back-gate MoS2 transistors by NH3-plasma treating high-k gate dielectrics. Chinese Physics B, 2019, 28(12): 128101  
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Improved performance of back-gate MoS2 transistors by NH3-plasma treating high-k gate dielectrics
Chen Jian-Ying1, Zhao Xin-Yuan2, Liu Lu2, Xu Jing-Ping2, †
Ningbo Information Technology Service Center, Ningbo 315400, China
School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China

 

† Corresponding author. E-mail: jpxu@hust.edu.cn

Project supported by the National Natural Science Foundation of China (Grant No. 61774064).

Abstract

NH3-plasma treatment is used to improve the quality of the gate dielectric and interface. Al2O3 is adopted as a buffer layer between HfO2 and MoS2 to decrease the interface-state density. Four groups of MOS capacitors and back-gate transistors with different gate dielectrics are fabricated and their C–V and I–V characteristics are compared. It is found that the Al2O3/HfO2 back-gate transistor with NH3-plasma treatment shows the best electrical performance: high on–off current ratio of 1.53 × 107, higher field-effect mobility of 26.51 cm2/V·s, and lower subthreshold swing of 145 mV/dec. These are attributed to the improvements of the gate dielectric and interface qualities by the NH3-plasma treatment and the addition of Al2O3 as a buffer layer.

PACS: 81.07.-b;73.40.QV;85.40.-e;81.65.-b
Keyword:MoS2 transistor;high-k dielectric;NH3-plasma treatment;oxygen vacancy;mobility
1. Introduction

In recent years, molybdenum disulfide (MoS2), as one of the most representative two-dimensional semiconductor materials, has attracted more and more attention of researchers for its unusual electronic and optical properties.[1,2] Compared to graphene, atomically thin MoS2 has a thickness-dependent band gap ranging from 1.2 eV to 1.9 eV[3] and a relatively high intrinsic electron mobility at room temperature,[1] which make it possess great advantages in device application. The field-effect transistor (FET) based on ultra-thin (monolayer or multilayer) MoS2 channel exhibits high on–off current ratio (Ion/Ioff > 106), near-ideal sub-threshold swing, and reasonably high electron mobility,[1,4–9] which is very suitable for fabricating low-power logic circuits,[10] non-volatile memory,[11,12] and ultra-sensitive photodetectors.[13,14] However, although great progress has been made in this field, yet the performance of the MoS2 transistors is far from its theoretical value.[15,16]

As a channel material, forming a good interface with the gate dielectric is an important issue that should be addressed for fabricating high-performance transistors. The use of high-k dielectrics is extensively considered for the MoS2 transistor due to their roles of reducing the interface-state density and the strong dielectric screening effect on Coulomb scattering. As reported, Al2O3 and HfO2 are the most commonly used high-k dielectrics and to our best knowledge, Al2O3 is often used as a buffer layer between HfO2 and MoS2 to form a stack structure of HfO2/Al2O3/MoS2 because of its lower interface-state density with MoS2.[17–20] However, due to the effect of self-growth, a large number of oxygen vacancies exist in the gate dielectric,[21–23] which would block the carrier transportation in the channel. For solving this problem, some treatments were carried out to improve the quality of the gate dielectric, e.g., NH3-plasma treatment. Hong Bae Park et al. firstly confirmed that NH3-plasma treatment on the Al2O3 interlayer between HfO2 and Si substrate can result in a significant reduction of the fixed charge density and interfacial defects of the obtained MOS capacitors.[24] Wen et al. annealed the gate dielectrics (HfO2 and HfTiO) of back-gate MoS2 transistors in NH3 atmosphere, obtaining a great improvement of the device performance.[25,26] So, it has been showed that the NH3-plasma treatment has a potential of greatly improving the quality of the gate dielectric to achieve good device performances. Therefore, in this work, back-gate MoS2 FETs with HfO2 or Al2O3/HfO2 as the gate dielectrics are fabricated, and the NH3 plasma is applied to treat the two gate dielectrics before transferring the MoS2. The involved mechanisms that the NH3-plasma treatment improves the electrical performance of the MoS2 transistor are analyzed by means of the C–V measurement of the relevant MOS capacitors before and after the NH3-plasma treatment. Excellent electrical properties have been achieved for the MoS2 transistors with the NH3-plasma treatment, demonstrating that it is an effective way to improve the quality of gate dielectrics and thus the electrical performance of MoS2 transistors.

2. Experiments

Heavily-doped p+ silicon with resistivity of ∼ 0.01 Ω · cm was used as the starting substrate and back gate. An amorphous HfO2 was deposited by the atomic layer deposition (ALD) method using tetrakis (dimethylamino) hafnium (TDMAH) and H2O as the precursors and high-purity nitrogen as the carrier and purge gas. The TDMAH source was heated to 75 °C while the H2O source was kept at room temperature. The pulse time for TDMAH and H2O was 0.1 s and 0.02 s, respectively. The post-TDMAH or H2O pulse purge was 30 s. The HfO2 film was deposited at 200 °C and finished after 175 cycles or 152 cycles, respectively, resulting in a thickness of 15 nm or 13 nm. Subsequently, Al2O3 was deposited on the surface of the 13-nm HfO2 using trimethylaluminum (TMA) and H2O as the precursors and nitrogen as the carrier and purge gas. The deposition temperature was maintained at 200 °C and the injection schedule for one cycle of Al2O3 deposition was 0.02 s/15 s/0.015 s/15 s of TMA/purge/H2O/purge. The deposition was finished after 20 cycles to form a 2-nm Al2O3 film. Then, an NH3 (99.9995%)-plasma treatment was performed at 300 °C for 10 min with a flow rate of 10 sccm, 26.66-Pa vacuum, and 120-W power for a part of gate dielectrics of 15-nm HfO2 or 2-nm Al2O3/13-nm HfO2, which are reasonably good NH3-plasma treatment conditions summarized from our previous experiments. Multilayer MoS2 flakes (∼ 6 nm) were mechanically exfoliated from bulk MoS2 crystals and transferred to the surface of the HfO2/p+-Si or Al2O3/HfO2/p+-Si stack gates, because the multilayer MoS2 flake has larger drive current than monolayer MoS2 due to its higher density of states, multiple conduction channels, and higher extrinsic carrier mobility resulted from the stronger Thomas–Fermi screening.[1,4] Source/drain regions (50 μm × 50 μm) were defined on the top of the MoS2 flakes using e-beam lithography (EBL, JEOL6510 with Nanometer Pattern Generation System) and Cr (15 nm) and Au (50 nm) were deposited by electron-beam evaporation at room temperature, followed by a liftoff process. The samples were then annealed at 300 °C in a vacuum tube furnace for 180 s to remove resist residues and decrease the contact resistance. For clarity, the above four groups of devices without or with NH3-plasma treatment are denoted as HfO2, NH3-HfO2, Al2O3/HfO2, and NH3-Al2O3/HfO2 samples, respectively. At least four transistors were measured for each sample and the extracted parameters were their average values. Since the samples were fabricated under the same conditions, their contact resistances could be at a similar level.

The surface topography of the HfO2 and Al2O3/HfO2 gate dielectrics was measured by atomic force microscopy (AFM, Bruker Dimension Edge SPM System). High-frequency (HF, 1 MHz) C–V characteristics were measured at room temperature using Agilent 4284A precision LCR meter, and the current–voltage curve of the transistors was measured using Keithley 4200-SCS semiconductor parameter analyzer. All measurements were performed at room temperature in a dark atmospheric environment with electromagnetic shielding.

3. Results and discussion

Figures 1(a) and 1(b) show the cross-sectional diagrams of the MoS2 FETs with two kinds of back-gate structures. Figure 1(c) shows the thickness of the MoS2 film corresponding to different colors under optical microscope and figure 1(d) is the fabricated back-gate MoS2 FET under optical microscope. The channel length (L) is 2 μm and the channel width (W) is 1.2–3.1 μm depending on the flake shape as shown in Fig. 1(d).

Fig. 1. Schematic diagram of the back-gate MoS2 transistor structure: (a) HfO2 gate dielectric, (b) Al2O3/HfO2 gate dielectric, (c) thickness of MoS2 film corresponding to different colors under optical microscope, (d) MoS2 flake selected to fabricate transistor with L of 2 μm.

Figure 2(a) shows the typical HF C–V (1 MHz) curves for the metal/HfO2/p+-Si and metal/Al2O3/HfO2/p+-Si MOS capacitors with or without NH3-plasma treatment. As compared to the NH3-plasma treated samples, the HfO2 and Al2O3/HfO2 MOS capacitors without NH3-plasma treatment exhibit poorer C–V characteristics: smaller depletion-region slope and decreased accumulation capacitance Cox (38 pF and 35 pF, respectively). According to the formula keq = Cox tox/Aε0, where ε0 and keq are the vacuum permittivity and the equivalent dielectric constant of the gate dielectric, respectively, A is the electrode area (7.85 × 10−5 cm−2), and tox is the physical thickness of the gate dielectric, keq can be found to be 8.2 and 7.6 for the HfO2 and Al2O3/HfO2 gate dielectrics, respectively. However, after the NH3-plasma treatment, the accumulation capacitance of the NH3-HfO2 and NH3-Al2O3/HfO2 samples is increased to 49 pF and 44 pF, and the relevant keq becomes 10.6 and 9.5, respectively. In addition, the flat-band voltage (Vfb) and the equivalent oxide-charge density (Qox) of these MOS capacitors can be extracted using the following equations:[27]

where Cfb is the flat-band capacitance corresponding to Vfb, φms is the work function difference between the gate electrode and substrate, T is the measurement temperature, q is the electron charge, Cox is the oxide capacitance (accumulation capacitance) per unit area, and NA is the substrate concentration. The electrical parameters of the four groups of MOS capacitors are listed in Table 1. Obviously, after the NH3-plasma treatment, Qox can be significantly reduced and the relevant Vfb shifts positively. This is mainly attributed to the fact that the N atoms produced by NH3 plasma can be incorporated into the oxide to form HfON[28] and AlON[29] with higher keq, and also can repair oxygen vacancies in the oxide[30,31] to reduce the positive trap charges and shift Vfb in the positive direction. The XPS analysis is used to confirm N incorporation due to the NH3 plasma treatment, as shown in Figs. 2(b)–2(d). The Al 2p spectra of the Al2O3/HfO2 and NH3-Al2O3/HfO2 samples are shown in Figs. 2(b) and 2(c), respectively. The obvious peak at 74.6 eV is in a good agreement with the banding energy of Al–O bond.[32] While in Fig. 2(c), a peak occurred at 73.1 eV is corresponding to the banding energy of Al–N bond,[33] indicating N incorporation into the stack dielectric, which is further supported by a distinct increase of N 1s peak after the NH3-plasma treatment (NH3-Al2O3/HfO2 sample).

Fig. 2. (a) High-frequency C–V curves of all the MOS capacitors. Al 2p XPS spectra for (b) Al2O3/HfO2 sample and (c) NH3-Al2O3/HfO2 sample. (d) N 1s XPS spectra before and after NH3-plasma treatment on the stack dielectric of Al2O3/HfO2.
Table 1.

Electrical parameters of p+-Si/HfO2/metal and p+-Si/HfO2/Al2O3/metal MOS capacitors with and without NH3-plasma treatment.

.

Figure 3 shows the drain–source current (Ids) versus drain–source voltage (Vds) curves for high-k gate dielectric HfO2 and Al2O3/HfO2 back-gate MoS2 transistors with or without NH3-plasma treatment. It can be seen that all back-gate transistors are in n-channel enhancement mode. Furthermore, when gate–source voltage Vgs = 3 V and Vds = 2 V, the driving current of the HfO2 or Al2O3/HfO2 back-gate MoS2 transistor can be increased from 2.4 μA/μm or 3.4 μA/μm before the NH3-plasma treatment to 12.4 μA/μm (∼ 5.2 ×) or 15.6 μA/μm (∼ 4.6×) after the NH3-plasma treatment. The significant increase of the driving current is ascribed to the NH3-plasma treatment that reduces the trap charges in the gate dielectric and thus Coulomb scattering on the channel carriers, improves the interfacial quality, and decreases the gate leakage, as shown below.

Fig. 3. Output characteristics of the MoS2 transistors with or without NH3-plasma treatment on (a) HfO2 gate dielectric and (b) Al2O3/HfO2 stack gate dielectric. Vgs increases from 1 V to 3 V in steps of 1 V.

Figure 4 shows the transfer characteristic (Ids vs. Vgs) of the four groups of back-gate MoS2 transistors with Vds = 0.1 V. The devices have a low off current (10−12 A) with an on/off current ratios of 106 and 107 before and after the NH3-plasma treatment, respectively. Subthreshold swing (SS) can be extracted to be 281 mV/dec, 182 mV/dec, 240 mV/dec, and 145 mV/dec for the HfO2, NH3-HfO2, Al2O3/HfO2, and NH3-Al2O3/HfO2 samples, respectively. Obviously, the NH3-plasma-treated samples exhibit a largely decreased SS, indicating an improved interface quality after the NH3-plasma treatment. The interface-state density (Dit) between MoS2 and the gate dielectric can be calculated by the following equations:[34]

where k is Boltzmann’s constant and Cit is the interface trap capacitance per unit area. According to the SS and Cox extracted for each sample above, Dit can be found to be 1.1 × 1013 eV−1 · cm−2, 8.0 × 1012 eV−1 · cm−2, 8.4 × 1012 eV−1 · cm−2, and 5 × 1012 eV−1 · cm−2 for the HfO2, NH3-HfO2, Al2O3/HfO2, and NH3-Al2O3/HfO2 samples, respectively, with the smallest Dit for the NH3-Al2O3/HfO2 sample.

Fig. 4. Transfer characteristic in semi-logarithmic and linear scales for (a) HfO2 sample, (b) NH3-HfO2 sample, (c) Al2O3/HfO2 sample, and (d) NH3-Al2O3/HfO2 sample.

From the transfer curves in the linear region with Vds = 0.1 V in Fig. 4, the electron mobility can be extracted using

The peak mobility for the four groups of transistors is found to be 6.33 cm2/V·s (HfO2 sample), 19.22 cm2/V·s (NH3-HfO2 sample), 8.99 cm2/V·s (Al2O3/HfO2 sample), and 26.51 cm2/V·s (NH3-Al2O3/HfO2 sample). The largely enhanced μ is obtained for the transistors with the NH3-plasma treatment, which can be explained as follows. 1) The N atoms produced by the NH3 decomposition can be incorporated into the high-k gate dielectric to repair the oxygen vacancies, reducing the defects in the gate dielectric and thus Coulomb scattering on the channel carriers. 2) NH3 plasma can passivate the surface of the gate dielectric to reduce the dangling bonds and thus the surface roughness as shown in Fig. 5. The roughness (root-mean-square, an average value measured at four points for two samples) of the HfO2 and Al2O3/HfO2 before the NH3-plasma treatment is 0.88 nm and 0.54 nm, respectively, which is decreased to 0.63 nm and 0.37 nm after the NH3-plasma treatment. For comparison, the above two dielectrics were also thermally treated under the same temperature (300 °C) without using NH3 plasma, and the resulted roughness is 0.80 nm and 0.49 nm, respectively, as shown in Figs. 5(c) and 5(f), indicating that the plasma treatment rather than temperature is the main reason for the roughness reduction, which is similar to the results in Ref. [35]. The smooth surface of gate dielectrics is conducive to carrier transport due to weakened surface roughness scattering. 3) Last but not least, the interfacial Coulomb scattering is effectively suppressed due to the superior interface quality between the MoS2 channel and Al2O3 buffer layer, especially for the NH3-plasma treated Al2O3/HfO2 sample, since NH4 functional groups may also exist on the surface of the NH3-plasma treated dielectrics, which would highly increase the surface hydrophilicity, thus improving the contact status between MoS2 and the dielectric surface (a possible mechanism for better performance). It is expected that the Ids–Vds characteristics of the MoS2 FETs could be further improved by fabricating top-gate MoS2 FET,[19] adding encapsulation layer,[36] or functionalization of MoS2 surface, e.g., using sulfide treatment.[37]

Fig. 5. Surface topography of gate dielectrics for (a) HfO2 sample, (b) NH3-HfO2 sample, (c) only thermally-annealing HfO2 sample, (d) Al2O3/HfO2 sample, (d) NH3-Al2O3/HfO2 sample, and (f) only thermally-annealing Al2O3/HfO2 sample.

Figure 6 shows the transfer characteristic curves in linear scale and the hysteresis behavior of the transistors with or without NH3-plasma treatment. According to the transfer curve, the threshold voltage (Vth) can be calculated to be 1.19 V for the NH3-HfO2 sample and 0.89 V for the NH3-Al2O3/HfO2 sample, which are larger than their counterparts without NH3-plasma treatment (0.54 V for the HfO2 sample and 0.76 V for the Al2O3/HfO2 sample). The increase of Vth after the NH3-plasma treatment is mainly attributed to the decrease of the oxygen vacancies in the gate dielectrics and thus the negatively-charged interfacial states become dominant, decreasing ever depleting the electrons induced in the MoS2 channel and giving rise to a larger Vth. In addition, the transistors with NH3-plasma treatment have smaller hysteresis (0.3 V for the NH3-HfO2 sample and 0.2 V for the NH3-Al2O3/HfO2 sample) as compared with the transistors without NH3-plasma treatment (0.33 V for the HfO2 sample and 0.31 V for the Al2O3/HfO2 sample). The alleviated hysteresis can also be attributed to the reduced trap charges in the gate dielectrics and the improved interface quality by the NH3-plasma treatment.[17]

Fig. 6. Transfer characteristic in linear scale for (a) HfO2 and NH3-HfO2 samples, (b) Al2O3/HfO2 and NH3-Al2O3/HfO2 samples.

The electrical properties of the HfO2 and Al2O3/HfO2 back-gate MoS2 transistors with and without NH3-plasma treatment are summarized in Table 2. Because the NH3-plasma treatment can decrease the oxygen vacancies in the gate dielectrics and surface roughness, and Al2O3 as the buffer layer has a good interface quality with MoS2, the back-gate MoS2 transistor with the stacked gate dielectric of Al2O3/HfO2 plus NH3-plasma treatment exhibits excellent electrical performances.

Table 2.

Electrical properties of HfO2 and Al2O3/HfO2 back-gate MoS2 transistors with and without NH3-plasma treatment.

.
4. Conclusions

In summary, the back-gate MoS2 transistors with HfO2 or Al2O3/HfO2 as gate dielectric have been fabricated and effects of NH3-plasma treatment on the device performances are investigated by measuring the I–V curves of the transistors and high-frequency C–V curves of the relevant MOS capacitors. The reduction of the trap charges and the positive shift of the flat-band voltage in the MOS capacitors imply the decrease of oxygen vacancies in the gate dielectrics after the NH3-plasma treatment. The Al2O3/HfO2 back-gate MoS2 transistor with NH3-plasma treatment shows the best electrical performances with high on–off current ratio of 1.53 × 107, higher field-effect mobility of 26.51 cm2/V·s, and lower subthreshold swing of 145 mV/dec. The involved mechanisms are mainly attributed to the repair of oxygen vacancies in the gate dielectric by the NH3-plasma treatment and the passivation of dangling bonds on the dielectric surface, which reduces the defects in the gate dielectric and at the dielectric/MoS2 interface. In addition, the addition of the Al2O3 buffer layer is also conducive to the improvement of the interface quality between MoS2 and the gate dielectrics. Therefore, the stacked gate dielectric of Al2O3/HfO2 plus NH3-plasma treatment is a potential way to prepare high-performance MoS2 transistors.

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